“BML Inverted Solder Ball Reflow” process

01_16_2016 Update:

BML has reflowed 1/2 a dozen of the original QFN packages for the Lattice ICE5LP4K-SG48 FPGA using a hot plate. The same process has recently been modified for use with a LGA-28 packages as well ( shown above – which have no visible pads once placed on the board ). This enhanced process is more reliable and requires less manual soldering ( ideally none ) after reflow. The original method would sometimes result in a misaligned IC due to flux bubbling and lifting the light 7x7mm IC off the PCB prior to solder reflowing. This new process tacks the IC in place with solder – preventing the issues with flux bubbling and the IC moving.

Improved 2016 BML Inverted Solder Ball Reflow process for QFN and LGA devices:

• Step-1 : Solder bump the PCB pads only for components to be reflowed.
• Step-2 : Solder bump the QFN / LGA pads of the IC as well ( apply flux too ).
• Step-3 : Align components under microscope and tack into place using flux paste.
• Step-4 : Using soldering iron, heat the corner PCB pads going to IC.
• Step-5 : Solder the ground lug from behind ( if device has one ).
• Step-6 : Reflow PCB for 4 1/2 minutes on a hot plate ( Aroma ) .
• Step-7 : Visually inspect and hand touchup pads using soldering iron.

07_24_2015

Black Mesa Labs recently developed a unique and new solder reflow process for soldering 0.5mm pitched QFN packages. The process is called “BML Inverted Solder Ball Reflow”.  Rather than apply paste or individually solder bumping the QFN package ( time consuming and expensive ),  the PCB is instead solder bumped ( quick and essentially free ) using a regular soldering iron and standard rosin core solder. Once the PCB is bumped, the QFN is simply reflowed to the PCB using a hotplate. Proper QFN component alignment prior to reflow is crucial and is made possible using flux paste.

The Black Mesa Lab Inverted Solder Ball Reflow Process:

•   Step-1 : Solder Bump the PCB pads only for components to be reflowed.
•   Step-2 :  Align components for reflow and tack into place using flux paste.
•   Step-3 : Reflow PCB for 5 minutes on a hot plate.
•   Step-4 : Visual inspection and hand touchup QFN pads using soldering iron.
•   Step-5 : Hand solder remaining components.

How I got on this path is the need to reflow QFN ( leadless ) packages. Xilinx – my goto FPGA provider has gone completely BGA with all their new devices after Spartan6 (45nm) generation.  BGA devices are great unless you are designing 2-layer and 4-layer PCBs and wanting to reflow at home. Basically, I needed a new FPGA vendor that is more aligned with the Maker Movement – small, inexpensive and easy to assemble FPGAs for 2-layer PCBs. Atmel is an awesome company ( they still sell AVR / Arduino CPUs in DIP packages ! ) profiting immensely from Maker community ( all the Arduinos out there ) – but sadly have no FPGA technology.  I discovered Lattice has a 40nm FPGA family called ICE40 that are small inexpensive FPGAs in QFN32 5x5mm and QFN48 7x7mm packages ( majority are still in BGAs of course ). For $2 – $5 I can buy 400 to 5,000 Logic Cell FPGAs that can be soldered to 2-layer PCBs . Compare this to Xilinx Spartan6 XC6SLX9-TQFP144 at 20x20mm at $15 and you can understand my reasoning to chose Lattice over Xilinx for my Maker designs going forward. The picture below shows my new Lattice design ( all components on top side of PCB, FPGA in center ) versus my last Spartan6 Xilinx design ( top side is nothing but FPGA, bottom side has all the other components ).

Lattice Nano-FPGA versus Xilinx Nano6-FPGA Board:

Back of the larger Nano6 ( with more IO brought out ). Shows all the components on the back.

QFNs vs QFPs :

Regarding QFNs ( leadless ) – they are fantastic small and inexpensive packages with great thermal characteristics and compatible with 2-layer PCBs, but difficult to hand solder compared to QFPs ( leaded ) as there are no leads.  They really want to be reflowed in an oven with paste much like a BGA. I almost purchased a toaster oven for BML but Nathan Seidle at Sparkfun.com wrote this great tutorial on using an electric skillet for reflowing surface mount PCBs instead of an oven.  I have decided to try this path for my own prototyping for a number of reasons. One limitation of the skillet method is only populating one side of PCB with components.  If you have seen my previous designs, you know I like to get 2 square inches of components on a 1 square inch PCB – so this is a definite drawback for me.  On the flip-side ( or NOT as it turns out ) I am wanting to start some designs I could potentially have manufactured and sold through Sparkfun – so going single sided for component placement makes sense. Here is a picture of a single sided Sparkfun PCB getting reflowed:

My new PCB designs – “Mesa Zero” and “EVEy Video” are actually my 3rd assembly using the skillet/hot plate method.  The 1st 2 attempts were small QFN32 Lattice ICE40 FPGA boards. 1st attempt was using actual solder paste.  The paste was very messy to apply and post reflow left microscopic solder balls on the PCB solder mask I needed to carefully inspect and cleanup. The biggest downside of solder paste however is the shelf life of only a couple of weeks ( it dries up ). 2nd attempt was using my new Inverted Solder Ball method, but trying to reflow everything with no hand soldering. The small 0603 components tended to bounce around as the flux paste turned to liquid and started bubbling. Both attempts ~worked~, but required a lot of cleanup and hand soldering cleanup post reflow.

One tricky thing about QFNs ( also known as MLFs ) is the substrate ground slug in the center. For many devices – it is the only ground connection and must be soldered – so I place a 0.125″ hole underneath the slug. Unfortunately, this means no routing underneath the package.  For my Xilinx TQFP designs, I always have top-side 1.2V and 3.3V power “planes” underneath the package ( virtual 4-layer ). For QFNs, this isn’t possible as top-side is a ground slug ( and ground is on the bottom side ).

The most difficult thing about QFNs are the leads – they don’t exist – so you can’t see them from above. To check alignment, I need to angle the PCB from all 4 sides.  My 1st attempts I used Elmer’s Glue to hold the package in place while I checked alignment under a microscope.  This actually worked really well, but then I discovered flux paste, solder flux, but in a paste.  A single product replaced liquid flux and the glue. Now I use the flux paste to hold the QFNs in place while I angle the PCB to check aligment. The paste flux melts prior to the solder and becomes a necessary wetting agent ( surfactant ) to improve the soldering process to the pads. Amazing stuff that works great!

Here is my new procedure in detail, it involves 5 steps but achieves very good results:

Step-1 ) Decide which components I need to reflow on the hot-plate and using a regular soldering iron, solder and liquid flux to tin the pads for those components. This is my “Bumping” process.

OSH-Park Rendering:

PCB as delivered from OSH-Park:

Solder placed on QFN and QFPs pads:

These pictures are the 2 PCBs before and after I solder the pads. The “Mesa Zero” board is a 32bit ARM Cortex M0+  Arduino Zero clone.  The SAMD21 CPU is only $6 and is equivalent in horse power to a Intel 386 CPU from the 1990s containing 256KBytes of flash and 32K Bytes of SRAM in a 7x7mm TQFP48 package.  I designed the board thinking it had a ground slug, but the device does not – so I did not solder underneath that package. The micro-USB connector has caused me grief soldering by hand in the past as the solder tends to flow inside the connector and obstructs cables from plugging in.

OSH-Park Rendering:

PCB as delivered from OSH-Park:
Solder placed on QFN and QFPs pads:

The “EVEy Video” board is designed around EVE embedded video with a FTDI FT813 800×600 SVGA GPU in a QFN56 package and a TFP410 in a TQFP64 package for reflow and also a small 5x3mm oscillator. This step-1 of soldering the PCB pads with regular solder is equivalent in function to applying solder paste in a normal production assembly.

Step-2 ) After solder is applied to pads I place the components on the PCB and use this Rosin Paste Flux to keep them from sliding around.  The QFPs aren’t that big of a problem as from a vertical viewpoint, I can tell if the 0.5mm pitch leads are aligned.  The QFNs however require me to turn the PCB at 45 degrees for all 4 sides to see if the leads are aligned and is tricky under a 10x microscope. This flux paste keeps the components from sliding around. One caveat is that the paste quickly turns to liquid above about +85F, so the PCB and room must be below that melting point. This picture shows the paste in four corners of each device ready for reflow:

Step-3 ) Time for reflow.  For less than $20 I bought this awesome Aroma Hot Plate from Amazon

The solder flux seeps through all the vias and makes a sticky mess of things, so I use a sheet of aluminum foil between my PCBs and the hot plate. My 1st attempt I used the “High” setting and I swear the FR4 almost caught on fire ( certainly discolored the OSH-Park Purple to Brownish ). This go around I used “Medium” and it reflowed from “Off” to “Medium” in about 5 minutes. I actually use the hotplate as my permanent “work area” base for microscope work now. Unfortunately, it takes a good 30 minutes to cool down completely.

Step-4 ) Inspection and touchup:

The TQFP had a few leads needing touchup when I inspected with my dental pick.

The QFN stayed completely aligned thankfully.  I believe that QFNs reflow much like BGAs and tend to “self align” once the solder has turned molten.

Here is a link to a great video of a BGA package reflowing on top of solder paste slightly out of alignment and snapping perfectly into place. The entire package floats on these molten spheres of solder and aligns automatically.  I believe I am achieving the same results with my QFNs.

Oscillator did well under reflow and stayed aligned.

I had to remove a bunch of flux ( using a wooden toothpick ) to fully inspect all of the pads on the QFN.  The QFN I could see some “non-silver” on the sides so I went ahead and soldered by hand all the leads just to be certain. The real leads are underneath and can not be visually inspected, but seeing solder on the sides is assurance there is some connection. Once the package is aligned, hand soldering the side “walls” is easy, it is just a matter of rolling a giant solder ball down each side. Step-4 is about soldering all the leads by hand. Step-4 is only possible if Step-3 succeeds in holding the components in place perfectly aligned – which it did. Note that I use really large 0.25 x 1.75mm pads for the QFN when 0.25×0.50mm would normally work.  This makes for easier cleanup as it provides a large surface area for the excess solder to adhere to. Step-4 cleanup is as easy as dumping flux to an area and running my soldering iron tip across it. The solder magically seeks out and adheres to all non solder masked surfaces. No solder wick required. Flux is great stuff. Here is a Before and After of Step-4 on the QFN:

Before Cleanup Pass:

After Cleanup Pass:

After Step-4, nothing but silver.  Step-4 is all about hand soldering and inspection of the difficult components. It is imperative to ensure all the difficult components are properly soldered prior to installing the other components as access to the QFNs and QFPs with an iron becomes much more difficult when all the bypass caps, etc are in place. Previously I would use a lot of solder wick for cleanup, now I tend to just use liquid flux as the excess solder will scramble and adhere to the soldering iron tip so long as the tip is clean. This method requires more cleanup ( alcohol and Q-tips – but they are cheap at 1,000 for $10 ).

Step-5, the final step is soldering all of the small components, 0603 and SOT-23, SOIC8 devices and large connectors by hand. Once they are on and I do a final visual component inspection and alcohol scrub and then solder the large through hole connectors. Presenting the final assembly!

07_25_2015

Spent some time writing FPGA firmware and trying to bringup EVEyVideo. No valid video out yet. Able to toggle the FT813’s GPIO PowerDown output pin, so basic SPI communication is working. Video timing is complicated and this chip has a million registers and proper sequences to follow, so need to persist at it.

07_26_2015

EVEyVideo is Alive!

This morning I succeeded in getting a valid HDMI video signal at 800×600 @ 30 MHz dot clock out of EVEyVideo design. The “@ A B C” are the 1st things I got the GPU to display ( graphics come next ). To save engineering time, rather than try and bring up the FT813 GPU from the SPI Master interface on an Arduino ( and suffer through multiple compile and firmware loading ), I instead created a Nano3 ( Spartan3 XC3S200A ) FPGA design that provides 16 GPIO pins on the Nano Bus header.  This FPGA design can be re-used for anything as all 16 pins are configurable for Input,Output, Drive-1-Only or Drive-0-Only. Having a software bit-bang interface at 1st means I can script everything and iterate rapidly. Here is my 1st image:

Note: About the Nano Bus.  The “Nano Bus” isn’t actually a bus, but an electrical interconnect standard I established at BML for all of my FPGA and peripheral designs.  If you are familiar with PMOD, it is similar, but I think better of course. “Nano Bus” provides 2 GND pins, 5V Unregulated Raw Power ( current limited at 3A by pin ) and 3V regulated ( limited current by masters LDO ). The connectors are color coded Yellow=5V, Red=3V and Green = GND. I can quickly spot 2 PCBs with the Yellow and Green identifiers and know that I can plug them in without blowing anything up. The remaining pins, typically 4,8 or 16 in a dual row configuration are digital IO pins at 3V.  I have splitters that convert a x16 master to two x8s, or a x8 and two x4s, etc.  Also have “Gender Benders” so that I can plug 2 Masters together ( an FPGA and an Arduino for example ). It is a cost effective and versatile interface as I can build a FPGA with a x16 ( 2×10 0.100″ ) Nano Bus Header and plug a small x4 SPI peripheral board into it that is only 1/2″ wide. OSH-Park charges by the square inch, so I can build Nano Bus SPI chip peripherals boards for only $2-$3  that have a 2×4 0.100″ connector ( 2 GNDs, 5V,3V and 4 signals ).

Back to EVEyVideo bringup, so with the Nano3 FPGA as SPI Master to the FT813 in place, I then wrote a Python script for bitbanging the SPI Bits over a standard FTDI USB serial cable. Every SPI clock cycle takes two FTDI serial port writes at 921,600 baud which is REALLY slow of course ( takes about 1 minute for FT813 bringup ). Using this flow means I avoided compiling Arduino C code and flashing firmware. Scripting languages like Python, Perl and Powershell are a tremendous time saver for initial hardware bringup. C is king for final performance but awful for iterating and trying things.

That ends this blog, the EVEyVideo board is fully assembled and electrically all tested out. I will start a new blog in the future specific to EVEyVideo programming and where I plan to take this OSH project. My end goal is to provide a low cost and easy to use video interface for Arduino developers.